Paper Details

Development of a Family of Multi-Core Devices Using Hierarchical Abstraction

Authors: Duller, Andrew, Gray, Alan, Towner, Daniel, Iles, Jamie, Panesar, Gajinder, Robbins, Will

Abstract:

picoChip has produced a range of commercially deployed multi-core devices, all of which have the same on-chip deterministic communications structure (the picoBus) but vary widely in the number and type of cores which make up the devices. Systems are developed from processes connected using unidirectional signals. Individual processes are described using standard C or assembly language and are grouped together in a hierarchical description of the overall system. This paper discusses how families of chips may be developed by "hardening" structures in the hierarchy of an existing software system. Hardening is the process of replacing sets of communicating processes with an equivalent hardware accelerator, without changing the interface to that sub-system. Initial development is performed using a completely software implementation, which has advantages in terms of "time to market". When cost/power reductions are required, the proposed hardening process can be used to convert certain parts of a design into fixed hardware. These can then be included in the next generation of the device. The same tool chain is used for all devices and this means that verification of the hardware accelerator against the original system is simplified. The methodology discussed has been used to produce a family of devices which have been deployed in a wide range of wireless applications around the world.

Proceedings:

Communicating Process Architectures 2007, Alistair A. McEwan, Steve Schneider, Wilson Ifill, Peter H. Welch, 2007, pp 465 - 478 published by IOS Press, Amsterdam

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