Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
Chair of
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
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for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
Aspects of database machine design using the H1, C104 and Occam91
By Jon Kerridge, Richard J. Oates
In this paper we explore the design of a database machine that is already being implemented using T series transputers to determine the benefits of using the T9000 series transputer togeher eith its associated routing chip, the C104, and occam91. The language occam91, a superset of occam2, contains language features that directly support the exploitation of hardware features that have been incorporated into the T9000 transputer. We briefly introduce the underlying design of the database machine. The way in which the C104 routing chips can be used is then described in conjunction with a planar approach to the interconnection of nodes in the machine. Finally, we give fragments of occam91 that demonstrated how its features can be used in two different parts of the database machine. The first application considers the problems of allocating resources to a user query and the second looks at how recovery features can be specified.
Complete record...
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