Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
Chair of
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
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for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
Optimum Transputer Configurations for Real Applications Requiring Global Communication
By Colin J. Burgess, Alan G. Chalmers
If complex problems are to be solved in reasonable computation times, then large scale parallel processing is necessary. For many of these problems, the density of the global communications dominated the performance of the parallel implementation. In these cases, the design of the interconnection network for the processors is known to play a significant part in the efficient implementation of problems on a large T800 transputer systems. This paper presents a new genetic algorithm for generating optimal configurations, augmented by simulated annealing for selected refinement of difficult cases. These configurations have the further advantage that they satisfy the best known criteria for producing configurations that perform well on real applications. The paper concludes by describing the impact this might have on the design of future T9000 transputer configurations.
Complete record...
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