Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
Chair of
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
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for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
A Reconfigurable System-on-Chip Architecture for Pico-Satellite Missions
By Tanya Vladimirova, Xiaofeng Wu
Spacecraft operate in the unique space environment and are exposed to
various types of radiation. Radiation effects can damage the on-board electronic circuits, particularly silicon devices. There is a pressing need for a remote upgrading capability which will allow electronic circuits on-board satellites to self-repair and evolve their functionality. One approach to addressing this need is to utilize the hardware reconfigurability of Field Programmable Gate Arrays. FPGAs nowadays are suitable for implementation of complex on-board system-on-chip designs. Leading-edge technology enables innovative solutions, permitting lighter picosatellite systems to be designed. This paper presents a reconfigurable system-onchip architecture for pico-satellite on-board data processing and control. The SoC adopts a modular bus-centric architecture using the AMBA bus and consists of soft intellectual property cores. In addition the SoC is capable of remote partial reconfiguration at run time.
Complete record...
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