Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
Chair of
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
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for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
Performance Analysis and Behaviour Tuning for Optimisation of Communicating Systems
By Mark Green, Ali E. Abdallah
Improving performance is the main driving force behind the use of parallel systems. Models for performance evaluation and techniques for performance optimisation are crucial for effectively exploiting the computational power of parallel systems. This paper focuses on methods for evaluating the performance of parallel applications built from components using the software architecture methodology. Minor differences in the low-level behaviour of functionally equivalent processing elements can have a dramatic effect upon the performance of the overall system; this confounds attempts to predict performance at any step prior to implementation. VisualNets is a tool supporting the construction and graphical manipulation of interacting systems built from components. It makes use of specifications in the formal method CSP, which enables the relevant component behaviours and the linkage between components to be concisely described. The tool allows the behaviour of the whole system over time, and the patterns of interaction between the components, to be visualised through graphical animation. The graphical display produced facilitates the analysis and evaluation of performance, and highlights areas where performance could be improved via better utilisation of parallel resources. VisualNets also allows the timing properties of the components and of the architecture that underlies them to be changed, to represent different component implementations or platform configurations. A case study, based on the dual pipeline architecture, is presented to show how the graphical animation capability of VisualNets can be used, firstly to evaluate performance, and secondly to guide the development of more efficient versions of the parallel system.
Complete record...
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