Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
Chair of
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
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for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
The Automated Serialization of Concurrent CSP Scripts using Mathematica
By Weiyang Zhou, G. S. Stiles
This report discusses the design and implementation of a package of Mathematica-based tools for serializing scripts describing the behavior of concurrent systems in CSP. Under some conditions, serialization can yield code that is more efficient than multi-process versions and can better meet processor constraints. Under most conditions concurrent design is easier and more reliable so we prefer to design concurrently and only implement serially when necessary. The tools include a set of definitions and procedures to automatically change concurrent code to serial code. Conversions of the following step laws have been implemented thus far: external choice, generalized parallel, and alphabetized parallel; additional laws will be implemented in the next month or so. The tools support the input of the more formal typeset notation of CSP, which makes the script writing intuitive, and can convert the typeset version to the machine-readable version required by software such as FDR. The correctness of the conversions has been checked with the FDR package. This package should be of use to both those regularly working on concurrent systems and those learning CSP.
Complete record...
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