WoTUG - The place for concurrent processes

Refer Proceedings details

%T "Do it yourself" shared memory instruction sets in occam
%A M. I. Cole
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X We present an approach to the task of
   "civilising" distributed memory
   architectures, in which the programmer is presented with a
   shared memory computational model, augmented with
   application specific shared memory instructions. We note
   that this model can ease the dimculty of designing and
   justifying algorithms, and that occam provides a suitable
   medium for its distributed implementation.

%T A deadlock\-free communication system for a transputer network
%A E. Gallizzi, M. Cannataro, G. Spezzano, Domenico Talia
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X The design and an implementation overview of a communication
   system which provides deadlock\-free operation in a tightly
   coupled message\-passing multicomputer system is presented.
   Furthermore, routing simulation results for a 4x 10 computer
   array are described. The communication system has many
   positive characteristics including provable
   deadlock\-freedom, guaranteed message arrival, and automatic
   local congestion reduction. This system has been implemented
   in Occam 2 on a network of Transputers.

%T A parallel semantic net engine and its application to data modeling
%A Y. N. Lee
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Although the use of Fourth Generation Languages has greatly
   increased the efficiency of the system development process,
   the validation of system specifications is still considered
   to be complicated and time\-consuming. A "Parallel
   Semantic Net Engine (PSNE)" has been developed as
   part of a research project carried out in the Department of
   Computer Science at Exeter University to investigate into
   this area. This project was initiated by a software house,
   Softwright Systems Ltd., which has made extensive use of
   Fourth Generation Languages.The purpose of this project was
   to construct an engine which would be fast enough to
   validate a system specification in realtime, giving
   immediate feedback to the user when constraints are
   violated. The areas of knowledge representation and parallel
   processing were explored. A Parallel Semantic Net Engine was
   proposed in order to take advantage of the richness of
   semantic networks in representing complicated relationships
   and the power of transputers in speeding up the processing.
   Figure 1 shows the general model of the PSNE.The model is
   distributed over of a host PC and a network of transputers.
   On the PC side, there are the application generator,
   generated applications and a standard relational database
   which stores the application data. A front\-end would be
   developed running on the PC to act as the gateway for data
   passing between the PC and the transputers.

%T Parallel\-DB4GL: An implementation of a self\-describing object\-oriented database application generator on transputer hardware
%A J. P. Gray, F. Poole
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X In general, this research project is concerned with the use
   of transputer based parallel hardware to improve the
   performance of database software. Specifically, the aim of
   the project is the enhancement of a database application
   generation system, Data Base 4th Generation Language
   (DB4GL), by converting the DB4GL generated database
   applications to run on transputer networks.A prototype
   Parallel\-DB4GL (P\-DB4GL) system has been designed and
   implemented. In P\-DB4GL, the application code modules
   generated by DB4GL have been redesigned as concurrent Occam
   [InmosSSb] processes. A number of DB4GL data access code
   modules (entity handlers and schema handlers) have been
   implemented, and used to construct simple database
   applications. Additionally, simulations of DB4GL modules not
   yet implemented (for example, User Processes and Filer
   Processes) have been written, and used in the testing of
   these simple database applications.The P\-DB4GL applications
   have been test run on a number of different transputer
   configurations. Results have been obtained which show
   significant performance improvements when applications are
   run on small (one to four processors) transputer networks.
   The principal benefit comes from the ability to perform
   multiple concurrent disc input/ouput, thus increasing disc
   throughput, and hence improving overall application
   performance. Development and testing of the prototype
   P\-DB4GL has confirmed the feasibility of using transputer
   based parallel hardware for DB4GL applications. It has
   indicated how and where significant performance gains can be
   obtained in the full working version of P\-DB4GL, currently
   under development.

%T Using Transputers to Simulate Optoelectronic Computers
%A I. Cramb, C. Upstill
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X In this paper we present the results of our simulation and
   study of an optoelectronic SIMD architecture on a medium
   sized transputer array (18 processors). The particular
   optoelectronic architecture we have simulated is a Binary
   Image Algebra (BIA) Processor of considerable computational
   power \-processing data at rates well in excess of those
   currently achievable using electronic computers. Considering
   the inherent parallelism of such an architecture, along with
   the need for very large amounts of data processing in order
   to perform realistic simulation, the simulator was
   implemented in occam on a transputer array. The process
   model of computing adopted by occam is also most appropriate
   to the optoelectronic architecture which we have designed
   because of its modularity: we have been able to design
   process structures which have the same topology as the
   processing modules in our architecture. In the
   optoelectronic architecture, data are transmitted to a set
   of processing modules, one of which is chosen to perform a
   particular operation; the data pass through that module and
   are are transformed as they do so; in our simulator the
   processing takes place in a very similar way: data are
   transmitted from the controller to the farm; a particular
   process/module of code is called, and the data are passed
   through it, using occam channels, and are processed as they
   do so.We begin with a description of BIA itself. The core of
   the paper is a description of the logical architecture we
   have adopted; we include an account of a method for reducing
   the limiting effect of the transputer link bandwidth on the
   performance of farming computationally undemanding tasks.
   The paper is concluded with a brief description of our
   design for an optoelectronic SIMD architecture.

%T An investigation of several parallel genetic algorithms
%A Donald Macfarlane, Ian R. East
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Genetic algorithms (GAs) are important search and
   optimisation techniques with a wide range of applications.
   The demand for GAs with fast response times has led to the
   investigation of parallel implementations. Three parallel
   GAs are designed, implemented on a transputer network, and
   compared over several benchmark problems. It is believed
   that a fine\-grained approach to parallel genetic algorithms
   is the most promising.

%T An efficient global convergence detection scheme for parallel algorithms on transputer network
%A K. G. Kumar, A. Basu, S. Srinivas, A. Paulraj
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X The paper discusses a novel and efficient scheme for the
   detection of global convergence in parallel iterative
   algorithms. Convergence information is maintained as
   processes which execute concurrently with computations of
   the algorithm and exploit the asynchrony inherent in the
   progress of most executions of such algorithms towards
   global convergence. The scheme treats messages signalling
   convergence as having a lower priority as compared to those
   signalling non\-convergence. It minimizes the waiting time
   at the end of iterations for convergence related
   communications. Analytical results indicate that the global
   convergence detection scheme proposed in this paper is
   faster than the methods proposed earlier [3]. The scheme is
   particularly suited for implementation on Transputer based
   parallel machines. An OCCAM implementation of the scheme on
   a torus of Transputers is described together with a method
   for experimental verification of the analytical results.

%T Implementing Recursion on a Double Ring Topology
%A J. L. Jacquemin
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X The widespread recursion problems can become much more
   time\-efficient if they are processed with the help of a
   parallel algorithm. The authors have shown that transputer
   networks are able to bring an outstanding efficiency in the
   case of a double ring topology. A special care is given to
   load balancing, performance enhancement techniques and
   optimization of interprocessor communication.The method
   presented here can be implemented on any number of
   processors by merely changing a single parameter: The number
   of processors involved.

%T A Distributed Logic Programming Language and its Implementation on Transputer Networks
%A José A. Cardoso Cunha, Pedro A. Duarte Medeiros, Luis M. Pereira
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Currently there is a trend towards the development of
   programming tools and mechanisms for the support of
   heterogeneous multi\-agent systems on paralell computer
   architectures. This paper presents a contribution to this
   area, as far as logic programming on a distributed execution
   environment is concerned. We discuss the main issues on the
   design and implementation of the logic programming language
   Delta Prolog [2] [3] [6] [7] [11], extending Prolog with
   constructs for concurrency and communication. The work
   described is one of the research components of a project on
   the development of mechanisms for parallel logic programming
   support on parallel architectures, currently running in this
   University [8].

%T CS\-Prolog \-\- Parallel programming in logic with transputers
%A Steffen Schulze-Kremer
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X This paper describes the parallel features of CS\-Prolog, an
   extension of standard Prolog languages. CS\-Prolog employs
   the local virtual time concept and allows parallel
   evaluation of several Prolog goals making use of a variable
   number of transputers on an IBM\-AT compatible. Further,
   written in CS\-Prolog a program MolSIM is presented, that
   can carry out knowledge\-based simulation of
   molecularbiological regulatory processes.

%T Transputer models for a high\-performance local area network bridge
%A A. M. Sarrafan, Peter H. Welch
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Bridges interconnecting Local Area Networks can experience
   heavy loads. Traditional implementations of such devices
   have typically achieved high throughput rates by
   implementing the device at low protocol levels, thus keeping
   the functionality of the device quite simple in nature. For
   bridges that are required to have a higher degree of
   intelligence and for gateways between different networking
   technologies (which must be implemented at higher protocol
   levels), the problem is to maintain high throughput rates in
   a processing intensive component This paper describes an
   expandable and parallel solution to the problem. The
   methodology is demonstrated in an occam implementation of a
   Cambridge Ring bridge. The prototype is tested on several
   different transputer configurations and the results are
   reported. To put the figures into context, performance
   figures for an equivalent sequential implementation,
   currently operational at the University of Kent, are also

%T Design of a High Performance Protocol Analysis system using transputers
%A Sarvajna Kazi, Robert D. Hockman
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X The Problem : Managing Enterprise Networks Consisting of
   LANs and WANs.PCs and workstations are the tools of choice
   for many\-work\-group applications. When attached to
   increasingly large and complex Local Area Networks (LANs),
   they can efficiently share their own resources and those in
   diverse distributed servers. Increasingly, enterprises with
   widely distributed locations are linking these diverse LAN
   work\-groups via a variety of Wide Area Networks (WANs). The
   resulting heterogeneous networks form a geographically
   distributed LAN/WAN with a large number and diversity of
   computing and communication components. ....

%T Host\-independent access to transputers
%A Roger M. A. Peel
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Most Transputer development software is designed to run on
   Transputer hardware. The most common access mechanism to
   such facilities uses a Transputer card plugged directly into
   the expansion bus of a personal computer, workstation or
   minicomputer. The problem with this scheme is that the host
   machine must pass all communications to the Transputer, and
   thus must be involved even if the communication originated
   on another computer networked to this host. In addition,
   there is a physical limit to the number of Transputer cards
   which may be accommodated and individually controlled within
   each host.In order to support large populations of users
   economically, the author has developed a Transputer\-based
   Ethernet peripheral which can communicate directly with
   networked host processors, and supports multiple target
   Transputers, each running an enhanced version of the
   standard INMOS Iserver. Each target Transputer is therefore
   capable of running the Transputer Development System and the
   standalone Toolkit compilers, as well as user\[rs]s
   application programs. In addition, capabilities are provided
   for reserving clusters of client Transputers for the
   execution of multi\-Transputer applications.

%T Experimental studies of conservative distributed discrete\-event simulation on transputer networks
%A W. Cal, Stephen J. Turner
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Computer\-based discrete\-event simulation has a relatively
   long history. Traditionally, it has been performed in a
   sequential manner: the event\-list simulation mechanism
   ([1]) is a typical example. The idea of distributed
   simulation was proposed by Chandy in 1977 and is now being
   developed mainly along two directions \- the conservative
   approach (deadlock avoidance ([2]) and deadlock recovery
   ([3])) and the optimistic approach (time warp
   ([4])).Distributed simulation explores the potential
   parallelism inherent in most simulation applications. Each
   physical process (PP) in the application is simulated by a
   logical process (LP) in the simulation model. Events in the
   physical system are simulated by message transmissions
   between IPs. Since many simulation applications contain a
   high degree of parallelism, simulation seems to be a natural
   candidate for parallel processing. But, the causality
   constraint of the simulation, that is, events simulated by
   an LP must have a nondecreasing simulation time, is not
   easily maintained by distributed processing. Many strategies
   have been proposed: however, experimental studies need to be
   conducted in order to discover how much speed\-up is
   achieved with a distributed simulation as compared to
   sequential methods. Previous performance studies by other
   researchers ([5,6]) have mainly been carried out on
   shared\-memory parallel processors. In this paper, a set of
   experimental results is presented, designed to evaluate the
   effectiveness of conservative distributed simulation
   strategies on message\-passing parallel processors such as

%T A Transputer\-based Workstation Accelerator for Optimisation Algorithms
%A F. W. D. Woodhams, W. L. Price
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X This paper discusses the design of a transputer\-based
   accelerator for both combinatorial and global optimisation
   algorithms. Combinatorial optimisation has engineering
   applications in, for example, placement and routing of VLSI
   circuits. This type of problem is known to be in the
   complexity class NP\-complete 1. For the solution of these
   problems some form of random search heuristic is often
   required. One such heuristic is the simulated annealing
   algorithm^. This algorithm is usually too slow for the
   interactive user and is normally run on a mainframe

%T Occam program synthesis for execution on parallel machines: Towards a transformational approach
%A Xiaobo Yu, Traian Muntean
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X In this paper, we present a parallel program synthesis
   system which provides formal, methods and techniques for
   derivation and correct construction of implementations of
   occam programs on networks of transputers. The
   transformation rules are represented by a set of powerful
   algebraic laws of occam in order to perform the necessary
   transformation steps towards abstract forms representing
   models of execution of associated virtual machines.The
   program synthesis system can be applied to various aspects
   of parallel programming in a distributed environment, from
   the communication protocol design and correctness proof of
   implementation to parallel program construction, program
   optimisation, mapping strategies etc.Special emphasis is put
   on the transformation control strategies and guidance
   combined with information of the machine configuration, in
   order to achieve program optimisations, increasing
   parallelism granularity, altering inter\-process
   communication patterns, for efficient execution on the
   physical parallelism offered by target transputer machines.
   An example of application of the transformation system to
   the distributed implementation of global synchronisations is

%T A Dynamic Switch for Transputer Links
%A Jaap Hofstede, Andre Lensink
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X One of the goals of the Esprit project Pangloss wa

%T Processor Farm Analysis and Simulation for Embedded Parallel Processing Systems
%A R. W. S. Tregidgo, A. C. Downton
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X A brief survey of current Parallel Processing literature
   reveals a large number of highly application specific
   architectures [1] [2] [3] [4]. The arrival of the Transputer
   [5] has done little to alleviate this situation, in fact the
   only constraint on custom architectures seems to be the
   number of communication links currently supported by the
   Transputer. The lack of generality in such architectures is
   expensive and often makes future system expansion difficult.
   The objective of this paper is to show that by accepting
   some compromise on performance, general purpose
   multiprocessor systems can be analytically designed.

%T A method for monitoring occam internal channels
%A A. d'Acierno, Giuseppe de Pietro, Umberto Villano
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X In a Transputer environment, where the data exchange and the
   synchronizations between any two processes are carried out
   by means of I/O operations, the monitoring of the channels
   used for implementing the message exchange is of particular
   interest. In this paper a method is illustrated for
   monitoring the internal channels of an Occam program. This
   method introduces little CPU overhead, no additional
   communication cost, and preserves the synchronization
   behaviour of the two communicating processes. Its
   characteristics have been attained by means of a particular
   monitoring mechanism, based upon a rather unusual use of
   some Transputer machine language instructions, canonically
   used to implement guarded communications within the Occam
   ALT construct.

%T The design of a real time three demensional vision system for object idenification
%A Janet Edwards, Ian P. W. Sillitoe
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X The paper describes the design and analysis of a transputer
   based application, written in Occara\-2 and implemented on a
   network of transputers. The system generates volumetric
   representations of industrial objects in real time from a
   set of multiple views and forms a testbed for the
   investigation of various identification techniques to be
   used within an experimental industrial robotic workcell.The
   paper outlines the algorithm, its implementation and the
   efficacy of various design techniques used to increase the
   response of the system. It also makes recommendations for
   further work and useful tools to assist in writing efficient
   Occam code more effectively.

%T Control of a servo loop for a vision system
%A Tonny Stavenuiter, Herman Roebbers
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Transputers enable the implementation of complex control
   algorithms for robot systems at high sampling rates. With
   these new algorithms the need is felt for a better
   interaction between the robot and its environment Vision is
   an attractive sensor for the establishment of this
   interaction. This paper describes the development of a
   system, in which vision is used to track the tip of a robot

%T An application of ultrasonic signal processing in a mixed system of transputers and digital signal processors
%A Alastair R. Allen, Dalan Wang
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X A system is described in which a floating\-point digital
   signal processor is incorporated into a transputer array.
   The resulting combination provides a significant resource
   which is being used to process ultrasonic echoes to
   determine surface roughness.

%T Incremental behavioral simulations on a network of transputers
%A Keith Dimond, Samir Hassan
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X Simulation plays an important role in the design process for
   modern digital and analogue systems. There are many
   different types of simulators capable of representing the
   behaviour of the system at a number of different levels of
   abstraction. Because of its vital importance there is an
   ever increasing need to enhance the performance of
   simulators. Enhancements can occur in many different
   aspects. These may be in the speed of simulation, or in the
   accuracy of modelling. This paper describes a relatively new
   enhancement that of incremental operation which has the
   advantage of allowing the simulator to respond very rapidly
   to design changes in addition to providing an enhanced rate
   of simulation.The simulator which is described in this paper
   operates at the behavioural level. This allows the designer
   to specify, using suitable code segments descriptions of the
   behaviour of the functional blocks which make up the design.
   This approach may be used to model a digital system at the
   gate level, where signal values correspond to standard logic
   levels. In addition this mode of simulation has the
   attraction of being able to model very complex blocks which
   might very well have inputs and outputs which are most
   conveniently represented by complex data structures. This
   simulator is able therefore to model a complete system, some
   parts represented at this nigh\-level of abstraction whilst
   other parts may be modelled at the lower levels of
   abstraction where greater detail is required.

%T A high level software and environment for transputer based systems
%A Adrian J. West, Peter C. Capon
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X At Manchester we have a rack of Transputers that we use for
   research into parallel architectures[CGK86,AEK89]. These
   architectures are investigated by simulation, and some
   experience of this has already been gained. Currently,
   simulations are written in occam and drive the rack
   directly; a coding process that is rather slow, error prone
   and requires particular knowledge of the Manchester rack.We
   intend to provide a higher level environment that allows a
   more rapid and secure development to be achieved. As occam
   has been found to be a natural and flexible medium for
   expressing functional simulations, it has been retained in
   preference to a dedicated simulation language. The tools
   discussed in this paper are therefore applicable to occam
   programming generally, and will be used for the development
   of applications other than simulation.

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