Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2016,
the 38th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 21st. to Wednesday August 24th. 2016 and is hosted by the
Niels Bohr Institute,
University of Copenhagen.
Conference sessions will take place at the
Hans Christian Ørsted Institute, which is located
The evening Fringe sessions will be at the
which is just
a few minutes walk from the Ørsted buildings.
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
and to stimulate discussion and ideas on the roles concurrency will play in the future:
theory (programming models, process algebra, semantics, ...);
practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
education (at school, undergraduate and postgraduate levels, ...);
applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
Of course, neither of the above sets of bullets are exclusive.
for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
for system integrity (dependability, security, safety, liveness, ...);
for making things simple.
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
Multi-priority scheduling for transputer-based real-time control
A major requirement of real-time control applications is a set of cyclic processes — one for each "control-law". Each process must be managed so that it completes each cycle within a fixed time. The rate at which each process cycles will be constant, but will generally be different for different processes.Current transputer hardware provides very fast pre-emptive scheduling for two static priority levels, with "round-robin" management within each level. This is not sufficient to manage securely more than one such control-law per transputer — even at very low processor loadings. Efficient classical solutions (e.g. "rate-monotonic" or "deadline" scheduling) require multiple and time-varying priorities.This paper shows how to implement such solutions simply, and with an acceptable level of overhead, on the existing (and future) generation of transputer. Other promising scheduling methods are discussed. All solutions are expressed in occam with no assembler inserts and no security rules violated — the intended applications are safety-critical! Real performance figures are reported.Finally, a method of proving (or dis-proving) the security of any particular set of process loadings, operating under any particular scheduling algorithm, is described.