Communicating Process Architectures
Communicating Process Architectures 2013, the
35th WoTUG conference on concurrent and parallel programming, will take place
Edinburgh Napier University, in
Edinburgh, Scotland, from Sunday August 25th to Wednesday August 28th 2013.
For more information on CPA 2013, please see the
Call for Papers,
or the CPA 2013 pages.
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
and to stimulate discussion and ideas on the roles concurrency will play in the future:
theory (programming models, process algebra, semantics, ...);
practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
education (at school, undergraduate and postgraduate levels, ...);
applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
Of course, neither of the above sets of bullets are exclusive.
for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
for system integrity (dependability, security, safety, liveness, ...);
for making things simple.
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
An efficient global convergence detection scheme for parallel algorithms on transputer network
The paper discusses a novel and efficient scheme for the detection of global convergence in parallel iterative algorithms. Convergence information is maintained as processes which execute concurrently with computations of the algorithm and exploit the asynchrony inherent in the progress of most executions of such algorithms towards global convergence. The scheme treats messages signalling convergence as having a lower priority as compared to those signalling non-convergence. It minimizes the waiting time at the end of iterations for convergence related communications. Analytical results indicate that the global convergence detection scheme proposed in this paper is faster than the methods proposed earlier . The scheme is particularly suited for implementation on Transputer based parallel machines. An OCCAM implementation of the scheme on a torus of Transputers is described together with a method for experimental verification of the analytical results.