Communicating Process Architectures
Communicating Process Architectures 2012, the
34th WoTUG conference on concurrent and parallel programming, will take place
at the
University of Abertay Dundee, in Dundee,
Scotland, from Sunday August 26th to Wednesday August 29th 2012.
For more information on CPA 2012, please see the
Call for Papers,
or the CPA 2012 pages.
About WoTUG
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
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theory (programming models, process algebra, semantics, ...);
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practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
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education (at school, undergraduate and postgraduate levels, ...);
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applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
and to stimulate discussion and ideas on the roles concurrency will play in the future:
-
for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
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for system integrity (dependability, security, safety, liveness, ...);
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for making things simple.
Of course, neither of the above sets of bullets are exclusive.
WoTUG publications
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
General purpose parallel computers: a standard architecture with a standard programming interface
By Geoff Barrett, Eric Barton, Trevor Carden, Dominique Duval, Denis A. Nicole
Recent developments in the area of high performance computing are pointing the way to a standard architecture for parallel computers. This architecture contains a number of medium-cost processing elements which communicate with each other through a high-bandwidth, low-latency interconnect. The design of the interconnect eliminates the concerns of "locality" which are current in the programming of present-day machines. This "flat" topology and common architectural model lead to increased opportunities for establishing portable software for high performance computing. The Esprit GP-MIMD project has exploited these opportunities by developing the architectural model and denning a programming interface for software which runs efficiently on machines with a range of processing power.
Complete record...
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