%T The `Uniform Heterogeneous Multi\-Threaded\[rs] Processor Architecture
%A Daniel Towner, David May
%E Alan G. Chalmers, Majid Mirmehdi, Henk Muller
%B Communicating Process Architectures 2001
%X Multi\-threaded processor architectures are capable of
concurrently execut\-ing multiple threads using a shared
execution resource. Two of their advantages are their
ability to hide latency within a thread, and their high
execution efficiency. Un\-fortunately, single thread
performance is often poor. In this paper we present a simple
model of a multi\-threaded processor, and show how an
occam\-like language may be compiled into fine grained
threads suitable for executing on this processor. These fine
grained threads allow all but the most serial programs to be
compiled into multiple threads. Thus, poor single thread
performance is avoided by ensuring that sufficient threads
are always available, even at the instruction level. We call
this technique ‘uni\-form heterogeneous
multi\-threading’ (UHM). A compiler implementing UHM has
been built, along with a cycle accurate simulator of a UHM
processor. We demon\-strate that the processor is capable of
good performance, whilst being simple to design and build.
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