%T occam on Field Programmable Gate Arrays \- Optimising for Performance
%A Roger M. A. Peel, Barry M. Cook
%E Peter H. Welch, André W. P. Bakkers
%B Communicating Process Architectures 2000
%X This paper shows how the parallel occam code for a graphics
application has been compiled to run on a Field Programmable
Gate Array (FPGA). This application has stringent timing
constraints, and many optimisations to the sequencing of
operations and occam constructs have been employed to meet
them. In particular, two crucial pipelined processes are
shown to operate with no control overhead despite containing
parallel and looping constructs and channel communications.
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