%T A Transputer\-based Workstation Accelerator for Optimisation Algorithms
%A F. W. D. Woodhams, W. L. Price
%E Stephen J. Turner
%B OUG\-12: Tools and Techniques for Transputer Applications
%X This paper discusses the design of a transputer\-based
accelerator for both combinatorial and global optimisation
algorithms. Combinatorial optimisation has engineering
applications in, for example, placement and routing of VLSI
circuits. This type of problem is known to be in the
complexity class NP\-complete 1. For the solution of these
problems some form of random search heuristic is often
required. One such heuristic is the simulated annealing
algorithm^. This algorithm is usually too slow for the
interactive user and is normally run on a mainframe
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