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Paper Details

  title = "{E}xperimental studies of conservative distributed discrete-event simulation on transputer networks",
  author= "Cal, W. and Turner, Stephen J.",
  editor= "Turner, Stephen J.",
  pages = "138--147",
  booktitle= "{OUG}-12: {T}ools and {T}echniques for {T}ransputer {A}pplications",
  isbn= "90 5199 029 4",
  year= "1990",
  month= "mar",
  abstract= "Computer-based discrete-event simulation has a relatively
     long history. Traditionally, it has been performed in a
     sequential manner: the event-list simulation mechanism ([1])
     is a typical example. The idea of distributed simulation was
     proposed by Chandy in 1977 and is now being developed mainly
     along two directions - the conservative approach (deadlock
     avoidance ([2]) and deadlock recovery ([3])) and the
     optimistic approach (time warp ([4])).Distributed simulation
     explores the potential parallelism inherent in most
     simulation applications. Each physical process (PP) in the
     application is simulated by a logical process (LP) in the
     simulation model. Events in the physical system are
     simulated by message transmissions between IPs. Since many
     simulation applications contain a high degree of
     parallelism, simulation seems to be a natural candidate for
     parallel processing. But, the causality constraint of the
     simulation, that is, events simulated by an LP must have a
     nondecreasing simulation time, is not easily maintained by
     distributed processing. Many strategies have been proposed:
     however, experimental studies need to be conducted in order
     to discover how much speed-up is achieved with a distributed
     simulation as compared to sequential methods. Previous
     performance studies by other researchers ([5,6]) have mainly
     been carried out on shared-memory parallel processors. In
     this paper, a set of experimental results is presented,
     designed to evaluate the effectiveness of conservative
     distributed simulation strategies on message-passing
     parallel processors such as transputers."

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