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Paper Details

Automatic Handel-C Generation from MATLAB® and Simulink® for Motion Control with an FPGA

Authors: Rem, Bart, Gopalakrishnan, Ajeesh, Geelen, Tom J. H., Roebbers, Herman


In this paper, we demonstrate a structured approach to proceed from development in a high level-modeling environment to testing on the real hardware. The concept is introduced by taking an example scenario that involves automatic code generation of Handel-C for FPGAs. The entire process is substantiated with a prototype that generates Handel-C code from MATLAB®/Simulink® for most common Simulink® blocks. Furthermore, we establish the potential of the notion by generating Handel-C for an FPGA, which controls the flow of paper through the scanning section of a printer/copier. Additionally, we present another method to generate Handel-C from a state-based specification. Finally, to verify and validate the behavior of the generated code, we execute several levels of simulation, including software-in-the-loop and hardware-in-the-loop simulations.


Communicating Process Architectures 2005, Jan F. Broenink, Herman Roebbers, Johan P. E. Sunter, Peter H. Welch, David C. Wood, 2005, pp 43 - 69 published by IOS Press, Amsterdam

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