BSP Modelling of Two Tiered Architectures
Authors: Martin, Jeremy M. R., Tiskin, Alex V.
Abstract:In recent years there has been a trend towards using standard workstation components to construct parallel computers, due to the enourmous costs involved in designing and manufacturing special-purpose hardware. In particular we can expect to see a large population of SMP clusters emerging in the next few years. These are local-area networks of workstations, each containing around four parallel processors with a single shared memory. To use such machines effectively will be a major headache for programmers and compiler-writers. Here we consider how well-suited the BSP model might be for these two-tier architectures, and whether it would be useful to extend the model to allow for non-uniform communication behaviour.
Proceedings of WoTUG-22: Architectures, Languages and Techniques for Concurrent Systems, Barry M. Cook, 1999, pp 47 - 56 published by IOS Press, AmsterdamFiles: PDF, PS
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