An invitation to researchers and engineers to attend

The 19th Technical Meeting of WoTUG

Hosted by The Nottingham Trent University

31st March - 3rd April, 1996

General information

The concept of transputers and transputing has outgrown the confines of a single manufacturer. Many companies are marketing highly parallel systems which to a lesser or greater extent are following transputer principles. These principles are relevant to all types of processing - from high performance super computing to single processor micro-controllers in embedded systems.

The transputer principles are:

It is proving difficult to build efficient high-performance computer systems simply by taking very fast processors and joining them together with very high bandwidth interconnect. Apart from the need to keep the computational and communication power in balance, it is also essential to reduce communication start-up costs (in line with increasing bandwidth) and to reduce process context-switch time (in line with increasing computational power). Failure in either of these regards leads to coarse-grained parallelism, which results in insufficient parallel slackness to allow efficient use of individual processing nodes, potentially serious cache-coherency problems for super-computing applications and unnecessarily large worst-case latency guarantees for real-time applications.

Transputer principles impose no constraints on the granularity of process and communication. They give us the chance to design systems the ways the problems demand and produce implementations that scale efficiently in line with problem size and processor/communication resource. They are certainly worth checking out.

The novel angle recently demonstrated is that it has become possible to transfer these ideas efficiently on to many other architectures - creating virtual transputers.

Submissions to WoTUG-19, the 19th Technical Conference of the World occam(*) and Transputer User Group discuss the principles highlighted above and report on recent developments that have occurred in this area.

The Conference Proceedings will be published by IOS Press as part of their Concurrent Systems Engineering series.

Conference location

The conference will be hosted by Nottingham Trent University at the University's Clifton Campus. The centre has excellent facilities and is situated on the outskirts of Nottingham close to the motorway and is easily accessible by road and rail.

Nottingham is recognised as a world centre for innovation in computing, with the National Computing Centre, national super-computing facilities, a regional high-performance computing centre, and the national archive for the history of computing situated in the city.

Nottingham is famous for its Castle, Sherwood Forest and Robin Hood and is an exciting place to visit with many tourist attractions. Nottingham has excellent road and rail links and also good regional East Midlands Airport at Castle Donnington.

The program of events

The conference will comprise a number of different activities, including: The conference has a strong tradition of academic discussion, balanced by a warm and enjoyable social aspect.

The full program is available here

Registration information

Further information

If you would like to participate in the meeting please fill in one of the registration forms and sent it to the meeting organiser (address below). Should you have any queries please contact the meeting organiser:
Brian O'Neill
Department of Electrical and Electronic Engineering
Nottingham Trent University
Burton Street

Tel: +44 115 948 6044 (secretary: 0115 9418 418 extension 2799)
Fax: +44 115 948 6567

(*) all trademarks and registered names are acknowledged.