Bulletin number:  387
Products affected: Dx205 Dx214
Description: Idebug edge problem
Component: 
Date: Thu Apr 2 14:18:37 BST 1992
-----

There is a problem with idebug when used in breakpoint mode when there
are two or more links between any two processors.  The problem
manifests itself by hanging idebug if you try to locate to processor
connected after the pair of processors with two or more links between
them.

Workaround: For N links (where N is > 1) between two processors,
convert (N-1) of them into edges - this will fool the debugger
(because it doesn't know where edges are connected) and the program
should then be debuggable.

An example follows which invokes the problem (if the T800 is not
present the problem disappears, but that isn't the workaround
presented here):

--
--                               T425                        T414
--    ----------          ------  3    0  ------          ------
--   |          |        |      |--------|      |        |      |
--   |          |      1 |master|        |slave1| 2    1 |slave2|
--   | Debugger |--------| T222 |        | T425 |--------| T800 |
--   |          |        |      | 0    3 |      |        |      |
--   |          |        |      |--|  |--|      |        |      |
--    ----------          ------          ------          ------
--                                   ^
--                                   |
--                               2 EDGES (physically connected together
--                                        but the configurer doesn't know this
--                                        and the debugger doesn't either !)



--  Hardware Description
     
VAL K IS 1024 :
VAL M IS K * K :
NODE master, slave1, slave2 :
EDGE foolit1, foolit2 :
ARC hostarc, connarc1, connarc2, connarc3 :
ARC foolitarc1, foolitarc2 :
 
NETWORK
  DO
    SET master (type, memsize := "T222", 64 * K)
    SET slave1 (type, memsize := "T425", 1 * M)
    SET slave2 (type, memsize := "T800", 1 * M)
 
    CONNECT master[link][1] TO HOST            WITH hostarc
    CONNECT master[link][0] TO slave1[link][3] WITH connarc1
    --CONNECT master[link][3] TO slave1[link][0] WITH connarc2
    CONNECT slave1[link][2] TO slave2[link][1] WITH connarc3
 
    --  THE FOLLOWING 2 CONNECT STATEMENTS CONVERT A LINK INTO TWO EDGES
    --  comment out CONNECT WITH connarc2 and use the following to make
    --  an edge to fool idebug

    CONNECT master[link][3] TO foolit1 WITH foolitarc1
    CONNECT slave1[link][0] TO foolit2 WITH foolitarc2
:
 
--  Software Description
 
CONFIG
  PAR
    PROCESSOR master
      #USE "loop.c2h"
      loop ()
 
    PROCESSOR slave1
      #USE "loop.cah"
      loop ()
 
    PROCESSOR slave2
      #USE "loop.cah"
      loop ()
: