From: haude@physnet.uni-hamburg.de (Daniel Haude)
Newsgroups: comp.sys.transputer
Subject: Re: Need help with INMOS transputer system
Date: 26 Oct 1998 08:09:59 GMT
Organization: Hamburg University
Message-Id: <slrn738bin.617.haude@insitu.physnet.uni-hamburg.de>
References: <slrn72rg84.g47.haude@insitu.physnet.uni-hamburg.de>
    <362DC578.B0C1A99A@erh.ericsson.se>
Reply-To: haude@physnet.uni-hamburg.de


On Wed, 21 Oct 1998 13:28:56 +0200,
  Otto Tuil <otto.tuil@erh.ericsson.se> wrote:

> As far as I know (I've been out of transputers for a while), the DRAM refresh
> counter
> of the transputer is only 11 bits wide. If you use normal DRAM this means you
> can only
> refresh 2^11 * 2^11 = 4MB. Did you considered this behaviour in your upgrade?
> If not
> you must add some extra logic to expand the refresh counter.

Hmmm, the TRAM I use is equipped with 8 slots for 72-pin SIMMs, and in the
system it's normally sold with (not mine), it comes with 256MB but can be
upgraded even further. So I think the refresh logic has been taken care
of. I have put in a single 16MB SIMM (the manual says I can do so). Next
thing I do is try ou that SIMM in a regular PC if I can find one that has
the same type already installed (In PCs the SIMMs can only be used in
pairs. I guess that's because PCs use 32bit architecture unlike the
transputer's 16bit).

Thanks for the hints,
--Daniel

