From: William.Gilreath@usm.edu (William Gilreath) Newsgroups: comp.parallel Subject: CFP: Unconentional Parallel Architectures a Special Issue of Parallel Date: 28 Apr 1999 15:26:25 GMT Organization: University of Southern Missisippi Approved: bigrigg@cs.cmu.edu Message-Id: <7g79b1$485$1@goldenapple.srv.cs.cmu.edu> Originator: bigrigg@ux6.sp.cs.cmu.edu Xref: ukc comp.parallel:15532 CALL FOR PAPERS UNCONVENTIONAL PARALLEL ARCHITECTURES special issue of PARALLEL AND DISTRIBUTED COMPUTING PRACTICES Parallel computing systems as well as the corresponding software are continuously developing. These systems are predominantly multiprocessors based on general purpose processors, or networks of workstations equipped with the same processors. The use of standard architectures in solving different complicated problems implies enormous growing of software. As a result, the end user is forced to waste a lot of needless time, resources, and money. Evidently, this is not the only possible way of development of parallel systems. It is far from each user to need the universality and the top performance of a supercomputer. For a great many of important applications (image processing, databases, knowledge processing, digital signal processing, neural networks, etc.) some specialized parallel and distributed architectures can be found much more cost-effective. For instance, fine-grained SIMD, ASICs, systolic arrays, cellular automata machines, a.s.o. The present-day VLSI technology is favorable to fast and flexible implementation of specialized parallel and distributed architectures. The homogeneous cellular structures generally used in these devices fit perfectly the FPGA technology. One of the important trends can become the IP technology allowing to exploit diverse ready solutions directed toward parallel and distributed processing. In this Special Issue of PDCP various trends of unconventional parallel architectures will be addressed. Topics of interest ------------------ * fine-grained SIMD systems * data parallel programming * FPGA-based computers and accelerators * application specific devices * systolic architectures * cellular automata machines * associative memory and processor architectures * neural networks * reconfigurable architectures IMPORTANT DATES --------------- Paper due September 1, 1999 Notification November 30, 1999 Camera-ready February 1 2000 EDITORS ------- Yakov I. Fet Computing Center Siberian Div., RAS 6 Lavrentiev Ave. Novosibirsk 630090, RUSSIA Tel: +7 383 234 3994 Fax: +7 383 232 4259 E-mail: fet@ssd.sscc.ru Peter Kacsuk MTA SZTAKI Research Institute Victor Hugo 18-22 H-1132 Budapest, HUNGARY Tel: +36 1 329 78 64 Fax: +36 1 329 78 64 E-mail: kacsuk@sunserv.kfki.hu -- Articles to bigrigg+parallel@cs.cmu.edu (Admin: bigrigg@cs.cmu.edu) Archive: http://www.hensa.ac.uk/parallel/internet/usenet/comp.parallel