From: Kiran Bond Newsgroups: comp.parallel Subject: Reconfigurable Architectures Workshop 1999 (IPPS/SPDP) CFP Date: 21 Aug 1998 18:47:24 GMT Organization: University of Southern California, Los Angeles, CA Approved: bigrigg@cs.cmu.edu Message-Id: <6rkfbs$q3c$1@encore.ece.cmu.edu> Originator: bigrigg@ece.cmu.edu C A L L F O R P A R T I C I P A T I O N 6th Reconfigurable Architectures Workshop (RAW '99) April 12, 1999, San Juan, Puerto Rico http://maarc.usc.edu/~raw99 to be held in conjunction with 13th International Parallel Processing Symposium (IPPS '99) and 10th Symposium on Parallel and Distributed Processing (SPDP '99) (Sponsored by IEEE Technical Committee on Parallel Processing) http://www.ippsxx.org/ The 6th Reconfigurable Architectures Workshop (RAW '99) will be held in San Juan, Puerto Rico on April 12, 1999. RAW '99 is associated with the Second Merged Symposium of the 13th International Parallel Processing Symposium and the 10th Symposium on Parallel and Distributed Processing (IPPS/SPDP 1999). RAW '99 is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and industrial/practical advances in Reconfigurable Computing. Goal of the Workshop: Bridging Theory and Practice Advances in semiconductor and networking technologies have created opportunities for new and effective computing paradigms. Reconfigurable computing is one paradigm that has been the focus of both theoretical analysis and industrial development over the last decade. On the theoretical side, the use of configurable communication media (e.g., a reconfigurable bus system) allowed the development of solutions for several classes of problems with running times that are superior to those achieved by traditional parallel models using similar resources. A large body of knowledge has been generated as a result of this research. On the industrial/practical side, devices and systems that support various modes of reconfiguration (e.g., custom, dynamic, and self-configurable) have been developed. Several compute intensive, critical applications have been demonstrated on such systems. System design, application mapping and development of generic techniques and tools are also currently active areas of research. The need for interaction and exchange between the theoretical and the practical sides, which is the focus of the 6th Reconfigurable Architectures Workshop, is more important than ever at this junction in the development of both areas. Submitting Papers Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable computing (devices, systems, algorithms, software tools and applications). The topics of interest include, but are not limited to: + Reconfigurable Computing - Models - Algorithms and Complexity - Fault Tolerance Issues + Programmable Logic Devices and Systems - Architectures of Reconfigurable Systems - Implementations - Adaptable Systems - Evolvable Hardware + Development Tools and Methods - High-level Development Support - Compilation Techniques - CAD Tools + Applications - Mapping of Parallel Algorithms - Image Processing, Arithmetic/Geometric/Graph/Randomized Algorithms - Industrial Applications and Experiences A panel on "The Future of Reconfigurable Computing: Issues and Non-Issues" will be chaired by Ranga R. Vemuri, University of Cincinnati (USA). Submission Guidelines Authors should submit an electronic version of their work for review to "hossam@cs.newcastle.edu.au". All manuscripts will be reviewed. Submissions may be a summary of the work or a complete manuscript (not to exceed 10 pages of single spaced text, including figures and tables). Submissions should be in Postscript (level 2) format. Authors should make sure that the submission can be viewed using ghostscript and will print on a Postscript printer that uses standard letter size paper(8.5" x 11"). Submissions must be received by October 30, 1998. The workshop proceedings will be published by Springer Verlag as part of their Lecture Notes in Computer Science Series, and they will also appear in the CD-ROM version of the IPPS/SPDP '99 Proceedings. Important Dates - Manuscript due October 30, 1998. - Notification of acceptance or rejection due December 15, 1998. - Final version due January 31, 1999. Workshop Chair: Viktor K. Prasanna, University of Southern California (USA) prasanna@ganges.usc.edu Program Chair: Hossam ElGindy, University of Newcastle (Australia) hossam@cs.newcastle.edu.au Hossam ElGindy Dept. of Electrical and Computer Engineering The University of Newcastle Callaghan, NSW 2308 Australia Program Committee - Jeff Arnold, Independent Consultant (USA) - Michael Butts, Quickturn Design Systems, Inc. (USA) - Bernard Courtois, Laboratory TIMA, Grenoble (France) - Carl Ebeling, Univ. of Washington (USA) - Reiner Hartenstein, Univ. of Kaiserslautern (Germany) - Brad Hutchings, Brigham Young Univ. (USA) - Hyoung Joong Kim, Kangwon National Univ. (Korea) - Fabrizio Lombardi, Northeastern University (USA) - Wayne Luk, Imperial College (UK) - Patrick Lysaght, Univ. of Strathclyde (Scotland) - William H. Mangione-Smith, Univ. of California, Los Angeles (USA) - Malgorzata Marek-Sadowska, Univ. of California, Santa Barbara (USA) - Margaret Martonosi, Princeton Univ. (USA) - John T. McHenry, National Security Agency (USA) - Alessandro Mei, Univ. of Trento (Italy) - Martin Middendorf, Univ. of Karlsruhe (TH) (Germany) - George Milne, Univ. of South Australia (Australia) - Koji Nakano, Nagoya Institute of Technology (Japan) - Stephan Olariu, Old Dominion Univ. (USA) - Robert Parker, Information Sciences Institute East/USC (USA) - Jonathan Rose, Univ. of Toronto (Canada) - Hartmut Schmeck, Univ. of Karlsruhe (TH) (Germany) - Herman Schmit, Carnegie Mellon Univ. (USA) - Jerry L. Trahan, Louisiana State Univ. (USA) - Ramachandran Vaidyanathan, Louisiana State Univ. (USA) Publicity Chair: Kiran Bondalapati, University of Southern California (USA) kiran@usc.edu -- Articles to bigrigg+parallel@cs.cmu.edu (Admin: bigrigg@cs.cmu.edu) Archive: http://www.hensa.ac.uk/parallel/internet/usenet/comp.parallel