Peter Welch
Computing Laboratory
The University
Cabterbury
Kent
CT2 7NF
Email: P.H.Welch@ukc.ac.uk
Software models provided to the parallel applications engineer tend to
be low-level and specific to each architecture, causing difficulties
for secure and verifiable design, long learning-curves and severe
portability problems. Recent standardisation efforts (for
message-passing interfaces and data-parallel paradigms) still appear to
be too low-level and still have to prove themselves efficient.We need to find a high-level model of parallelism that is simple and architecturally neutral (so that it can be efficiently supported by current and future hardware platforms) and mathematically sound (so that it can be be made secure by a rich set of analysis and transformation tools). The applications engineer must be shielded from the parallel nature of whatever hardware is to execute the system, but must be exposed to the parallel nature of the application itself and must be able to express that freely with parallel software. Depending upon the application, the parallel software may have no direct reflection in the parallel hardware. Allowing and reconciling this divide is one of the grand challenges facing parallel hardware and software architects.