@InProceedings{Faust08b,
  title =        "{IC}2{IC}: a {L}ightweight {S}erial {I}nterconnect {C}hannel for {M}ultiprocessor {N}etworks",
  author=        "Faust,  Oliver and Sputh,  Bernhard H.C. and Allen,  Alastair R.",
  editor=        "Welch, Peter H. and Stepney,  S. and Polack,  F.A.C and Barnes,  Frederick R. M. and McEwan,  Alistair A. and Stiles,  G. S. and Broenink,  Jan F. and Sampson,  Adam T.",
  pages =        "219--235",
  booktitle=     "{C}ommunicating {P}rocess {A}rchitectures 2008",
  isbn=          "978-1-58603-907-3",
  year=          "2008",
  month=         "sep",
  abstract=      "IC2IC links introduce blocking functionality to a low
     latency
high performance data link between independent
     processors. The
blocking functionality was achieved with the
     so-called alternating
bit protocol. Furthermore, the
     protocol hardens the link against
message loss and message
     duplication. This paper provides a detailed
discussion of
     the link signals and the protocol layer. The practical
part
     shows an example implementation of the IC2IC serial link.
     This
example implementation establishes an IC2IC link
     between two
configurable hardware devices. Each device
     incorporates a process
network which implements the IC2IC
     transceiver functionality. This
example implementation
     helped us to explore the practical properties
of the IC2IC
     serial interconnect. First, we verified the
     blocking
capability of the link and second we analysed
     different reset
conditions, such as disconnect and
     bit-error."
}