db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
@InProceedings{Rem05,
  title =        "{A}utomatic {H}andel-{C} {G}eneration from {MATLAB}® and {S}imulink® for {M}otion {C}ontrol with an {FPGA}",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  author=        "Rem,  Bart and Gopalakrishnan,  Ajeesh and Geelen,  Tom J. H. and Roebbers,  Herman",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  editor=        "Broenink,  Jan F. and Roebbers,  Herman and Sunter,  Johan P. E. and Welch, Peter H. and Wood,  David C.",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  pages =        "43--69",
  booktitle=     "{C}ommunicating {P}rocess {A}rchitectures 2005",
  isbn=          "978-1-58603-561-7",
  year=          "2005",
  month=         "sep",
  abstract=      "In this paper, we demonstrate a structured approach to
     proceed from development in a high level-modeling
     environment to testing on the real hardware. The concept is
     introduced by taking an example scenario that involves
     automatic code generation of Handel-C for FPGAs. The entire
     process is substantiated with a prototype that generates
     Handel-C code from MATLAB®/Simulink® for most common
     Simulink® blocks. Furthermore, we establish the potential
     of the notion by generating Handel-C for an FPGA, which
     controls the flow of paper through the scanning section of a
     printer/copier. Additionally, we present another method to
     generate Handel-C from a state-based specification. Finally,
     to verify and validate the behavior of the generated code,
     we execute several levels of simulation, including
     software-in-the-loop and hardware-in-the-loop simulations."
}