db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
@InProceedings{DingxingXinmin92,
  title =        "{A}n {O}ptimised {P}arallel {C}ompiler for {E}xecuting {D}eclarative {P}rograms on {T}ransputer {A}rray",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  author=        "Dingxing,  Wang and Xinmin,  Tian and Weimin,  Zheng and Meiming,  Shen and Dongchan,  Wen",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  editor=        "Allen,  Alastair R.",
db_connect: Could not connect to paper db at "wotug@dragon.kent.ac.uk"<br>
  pages =        "231--245",
  booktitle=     "{P}roceedings of {W}o{TUG}-15: {T}ransputer {S}ystems - ongoing {R}esearch",
  isbn=          "90 5199 085 5",
  year=          "1992",
  month=         "mar",
  abstract=      "Many Declarative Programming Languages (DPLs) such as KL1,
     Prolog, PARLOG, Miranda and SML are considered attractive
     candidates for artificial intelligent application and
     execution on parallel architecture. However, there are many
     issues such as compile-time granularity analysis, partial
     evalution, task scheduling and load balancing for the
     efficient implementations of DPLs on multiprocessor system.
     In this paper, we take the emphasis on the compiling
     implementation of PARLOG and SML on a distributed memory
     multiprocessor system (transputer array). Under the graph
     rewriting framework, a Heterogeneous Parallel Graph Rewritng
     Execution Model (HPGREM) and corresponding description
     Language CIL are proposed. Based on the HPGREM, a parallel
     abstract machine PAM /TGR (Parallel Abstract Machine for
     Term Graph Rewriting) and corresponding compilation rules to
     generate PAM/TGR code are presented. Futhcrmore, an
     optimised parallel compiler for executing declarative
     programs on transputer array is described. The performance
     statistic on a 16-nodes transputer array demonstrates the
     effectiveness of our model, compiling techniques and
     compiler."
}